8–12 Sept 2025
Edward D. Hansen Conference Center
US/Pacific timezone
GRCon25 Draft Schedule is Live!

USRP FPGA Processing Using the RFNoC Framework

11 Sept 2025, 15:00
2h
Ballroom 3S (Edward D. Hansen Conference Center)

Ballroom 3S

Edward D. Hansen Conference Center

Workshop Intermediate & Advanced GNURadio Workshops Workshop

Speakers

Jonathan PendlumMr Neel Pandeya (National Instruments)

Description

This workshop provides a tutorial on the RFNoC framework, including a discussion on its design and capabilities, demonstrations of several practical examples, and a walk-through of implementing a user-defined RFNoC Block and integrating it into both UHD and GNU Radio. The RFNoC (RF Network-on-Chip) framework is the FPGA architecture used in USRP devices, specifically the E310, E312, E320, X300, X310, N300, N310, N320, N321, X410, X440. The RFNoC framework enables users to program the USRP FPGA, and facilitates the integration of custom FPGA-based algorithms into the signal processing chain of the USRP radio. Users can create modular, FPGA-accelerated SDR applications by chaining multiple RFNoC Blocks together and integrating them into both C++ and Python programs using the UHD API, and into GNU Radio flowgraphs. Attendees should gain a practical understanding of how to use the RFNoC framework to implement custom FPGA processing on the USRP radio platform.

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Primary authors

Jonathan Pendlum Mr Neel Pandeya (National Instruments)

Presentation materials

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