Speaker
Description
Distributed RF systems have become increasingly relevant in recent years due to the
rapid growth of technologies such as cell-free massive MIMO, satellite communication
networks, and the Internet of Things, due in part to major benefits in adaptability and
scalability. For systems such as these operating at microwave and millimeter-wave
frequencies, inter-platform synchronization is critical to ensure high performance;
however, this introduces significant clock distribution architecture challenges where
nodes are not physically connected via cables making typical low-frequency coupling of
reference oscillators between platforms is not possible.
In this talk, we outline the workflow and design process to enable CPU-offloading to an
FPGA for latency sensitive synchronization tasks, implemented using the open-source
LiteX framework on the LiteX M2SDR. First, we describe a typical coordination process
for a distributed wireless RF system as well as the software architecture required to
implement such an application. We motivate our example with a basic carrier frequency
offset implementation and demonstrate FPGA-enabled frequency compensation with a
three SDR experiment using a LiteX M2SDR, demonstrating the workflow for
customizing the LiteX gateware design in Python with Migen FHDL.
| Talk Length | 30 Minutes |
|---|---|
| Acknowledge | Acknowledge In-Person |